Designing for High Performance
Course Objectives
This course provides all necessary theoretical
and practical know-how to increase FPGA performance through various advanced
techniques.
The course goes into great depth and touches upon high frequency design problems, minimal area design, advanced timing analysis, advanced state machine design, design optimal arithmetic circuits and much more.
The course combines 50% theory with 50% practical work in every meeting.
The practical labs cover most of the theory and also include practical digital design.
This course also enriches digital engineers with many years of experience.
The course goes into great depth and touches upon high frequency design problems, minimal area design, advanced timing analysis, advanced state machine design, design optimal arithmetic circuits and much more.
The course combines 50% theory with 50% practical work in every meeting.
The practical labs cover most of the theory and also include practical digital design.
This course also enriches digital engineers with many years of experience.
General Information
Prerequisites
- FPGA design
- VHDL/Verilog
- TimeQuest
Duration & Attendance
2 days
Target Audience
Hardware engineers who develop FPGAs and would like to enhance their skills, in order to increase performance for logical, arithmetic, and state machine designs as well as timing problems that requires techniques such as pipeline, logic duplication, and alternative algorithms.
Additional Information
Teaching Methods & Tools
- Simulator: Modelsim
- Synthesizer and Place & Route: Quartus Prime
- Course book (including labs)