Developing Software for the Nios II Processor
Course Objectives
This course provides all theoretical and practical know-how to create and manage software projects in the Nios II Software Build Tools for Eclipse.
The course combines 50% theory and 50% practical work on Terrasic DE series evaluation board.
The course starts with an overview of the Nios II processor, a summary of FPGA hardware design flow, and the Nios II software design process and tools.
The course then teaches how to access peripherals through the Nios II Hardware Abstraction Layer (HAL), its specific APIs and file system.
The course then describes in details the Nios II BSP features such as HAL system header file, linker scripts, boot sequence, assessing and reducing code size, and Nios II exceptions.
The second part of the course focuses on practical use of advanced debug features such as JTAG debug core, multi?processor systems, and how to measure code performance with performance counter and profiler.
The course ends with hardware acceleration using custom instructions and custom components, and using Direct Memory Access (DMA).
The course combines 50% theory and 50% practical work on Terrasic DE series evaluation board.
The course starts with an overview of the Nios II processor, a summary of FPGA hardware design flow, and the Nios II software design process and tools.
The course then teaches how to access peripherals through the Nios II Hardware Abstraction Layer (HAL), its specific APIs and file system.
The course then describes in details the Nios II BSP features such as HAL system header file, linker scripts, boot sequence, assessing and reducing code size, and Nios II exceptions.
The second part of the course focuses on practical use of advanced debug features such as JTAG debug core, multi?processor systems, and how to measure code performance with performance counter and profiler.
The course ends with hardware acceleration using custom instructions and custom components, and using Direct Memory Access (DMA).
General Information
Prerequisites
- Embedded system software design
- C/C++ and assembly programming
Duration & Attendance
2 days
Target Audience
Software engineers who would like to develop application and BSP for the Nios II processor
Additional Information
Teaching Methods & Tools
- Synthesizer and Place & Route: Quartus Prime
- Nios II Embedded Design Suite
- Terrasic Cyclone V GX Evaluation board
- Course book (including labs)
Evaluation & Certification
Certification is provided to each attendee