Designing with Intel SoC for Software Engineers
Course Objectives
This course provides all theoretical and practical know-how to develop software for Intel SoC devices under Quartus Prime and ARM DS5.
The course combines 50% theory and 50% practical work on Terasic DE1-SoC evaluation board.
The course starts with SoC families overview and their capabilities, continues with deep methodic training of the SoC architecture.
The course teaches the HPS architecture and its building blocks, how to manage SoC system, how to configure system based on SoC, how to transfer data through the Bus system and internal interconnect, how to connect external memories.
The second part of the course teaches the software development flow for the SoC, how to perform boot process with and without operating system, how to write preloader and bootloader, how to use the flash programmer and OS support.
The course ends with SoC debug interfaces overview, how and when to use them, cross triggering between CPUs and FPGAs and how to use the system console manager.
The course combines 50% theory and 50% practical work on Terasic DE1-SoC evaluation board.
The course starts with SoC families overview and their capabilities, continues with deep methodic training of the SoC architecture.
The course teaches the HPS architecture and its building blocks, how to manage SoC system, how to configure system based on SoC, how to transfer data through the Bus system and internal interconnect, how to connect external memories.
The second part of the course teaches the software development flow for the SoC, how to perform boot process with and without operating system, how to write preloader and bootloader, how to use the flash programmer and OS support.
The course ends with SoC debug interfaces overview, how and when to use them, cross triggering between CPUs and FPGAs and how to use the system console manager.
General Information
Prerequisites
- Experience in embedded system design
- Quartus Prime basic knowledge
- SignalTap II Embedded logic analyzer basic knowledge
Duration & Attendance
3 days
Target Audience
Software engineers who would like to develop applications and BSP to platforms based on Intel SoC technology
Additional Information
Teaching Methods & Tools
Simulator: Modelsim
Synthesizer and Place & Route: Quartus Prime
Terasic DE1-SoC Evaluation board
Course book (including labs)
Synthesizer and Place & Route: Quartus Prime
Terasic DE1-SoC Evaluation board
Course book (including labs)
Evaluation & Certification
Certification is provided to each attendee