Parallel Computing with OpenCL for Intel FPGAs

Course Objectives

OpenCL is a standard for writing parallel programs for heterogeneous systems.
In the FPGA environment, OpenCL constructs are synthesized into custom logic.
This course introduces the basic concepts of parallel computing.
It covers the constructs of the OpenCL standard & Intel flow that automatically converts kernel C code into hardware that interacts with the host.
In hands?on labs, you'll write programs to run on both the CPU & FPGA.
In addition, the course covers the optimization techniques needed to implement a high performance OpenCL solution on an FPGA using the Intel SDK for OpenCL.
We will discuss good coding design practices, ways to improve data processing efficiency, memory access efficiencies, and host side optimizations.
We will also focus on Intel SDK for OpenCL specific features that can significantly improve OpenCL performance on FPGAs compared to other platforms.

General Information


  • FPGA design
  • VHDL/Verilog 
  • C programming language

Duration & Attendance

3 days

Target Audience

Hardware and software engineers who develop and work with parallel algorithms and computationally intense applications for Intel FPGAs

Additional Information

Teaching Methods & Tools

  • Synthesizer and Place & Route: Quartus Prime
  • Microsoft® Visual C++® 2010 (Express)
  • Windows® SDK 7.1
  • Intel® SDK for OpenCL™ Application 2012
  • Course book (including labs)

Evaluation & Certification

Certification is provided to each attendee