Designing with Intel SoC HW & SW
Course Objectives
This course provides all theoretical and practical know-how to design Intel SoC devices under Quartus Prime software.
The course combines 60% theory and 40% practical work on Terasic DE1-SoC evaluation board.
The course starts with SoC families overview and their capabilities, continues with deep methodic training of the SoC architecture.
The course teaches the HPS architecture and its building blocks, how to manage SoC system, how to configure system based on SoC, how to transfer data through the Bus system and internal interconnect, how to connect external memories, how to build a system with Qsys, how to handle interrupts, and how to use efficiently pin muxing.
The second part of the course focuses on practical use of simulation models (BFMs), and creating SoC test?benches.
The third part of the course teaches the software development flow for the SoC, how to perform boot process with and without operating system, how to write preloader and bootloader, how to use the flash programmer and OS support.
The course ends with SoC debug interfaces overview, how and when to use them, cross triggering between CPUs and FPGAs and how to use the system console manager.
The course combines 60% theory and 40% practical work on Terasic DE1-SoC evaluation board.
The course starts with SoC families overview and their capabilities, continues with deep methodic training of the SoC architecture.
The course teaches the HPS architecture and its building blocks, how to manage SoC system, how to configure system based on SoC, how to transfer data through the Bus system and internal interconnect, how to connect external memories, how to build a system with Qsys, how to handle interrupts, and how to use efficiently pin muxing.
The second part of the course focuses on practical use of simulation models (BFMs), and creating SoC test?benches.
The third part of the course teaches the software development flow for the SoC, how to perform boot process with and without operating system, how to write preloader and bootloader, how to use the flash programmer and OS support.
The course ends with SoC debug interfaces overview, how and when to use them, cross triggering between CPUs and FPGAs and how to use the system console manager.
General Information
Prerequisites
- Quartus Prime software
- Qsys
- SignalTap II Embedded Logic Analyzer
- Experience in embedded system design
Duration & Attendance
5 days
Target Audience
Hardware, software and system engineers who would like to design with Intel SoC technology
Additional Information
Teaching Methods & Tools
- Simulator: Modelsim
- Synthesizer and Place & Route: Quartus Prime
- Terasic DE1?SoC Evaluation board
- Course book (including labs)
Evaluation & Certification
Certification is provided to each attendee