Designing with Intel FPGAs using HLS

Course Objectives

This course provides all practical know-how needed to start designing with Intel FPGAs using HLS methodology.
The course starts from an overview of HLS design methodology versus the traditional FPGA design flow.
Then HLS procedure is studied along with HLS interfaces such as Avalon-MM and Avalon- Streaming.
The course continuous with various code optimizations for loops, data types, memory optimizations and performance optimizations.
The course provides practical tools and design methods for software and hardware engineers in order to increase their productivity with Intel FPGAs by using C language along with Intel HLS compiler.

General Information


  • FPGA architecture is not mandatory but recommended
  • C language

Duration & Attendance

3 days

Target Audience

Software engineers, Digital hardware engineers and FPGA team leaders, who would like to enhance their FPGA skills and achieve higher productivity in their FPGA design

Additional Information

Teaching Methods & Tools

  • Intel official course book (including labs)
  • Intel HLS Compiler 
  • ModelSim
  • Intel Quartus Prime Pro with Arria 10 family
  • 64-bit Linux Software Development Environment with g++